Andrew Zonenberg YosysHQ

00:00 Andrew Zonenberg Introduction
01:48 Where did your interest in HW security come from?
04:12 What’s the difference between FPGA & ASIC development?
05:45 FPGA experience
06:00 UNIX style OS for PICs
08:35 PCB checklist https://github.com/azonenberg/pcb-checklist
09:35 What's your motivation for your work on high speed electronics
11:17 One goal of Andrew’s is to replace some Cisco switches with his own design
12:12 Where are the challenges in building a high speed switch like this?
13:52 How do you get something like this to work first time?
15:40 Sonnet for simulation https://www.sonnetsoftware.com/
16:55 OpenEMS https://openems.de/start/
18:08 Is it possible to build an intuition for high speed layout?
20:43 New lab toys
24:22 Andrew’s work on scope probes
25:12 Signal path review of AKL-PT1 https://www.youtube.com/watch?v=eZhMIR0l3xU
26:30 Buy a probe from Elegant Invention: https://shop.elegantinvention.com/collections/antikernel-labs
27:00 AKL-PT2 - solder on version
29:05 What’s the cheapest bit of kit for signal integrity
30:45 Tips on 2nd hand tools
33:12 Andrew’s preference is equipment that is no longer manufactured but still in support
35:00 Sampling scope for repetitive signals - eye diagrams
35:40 Ted Yapo’s super con talk on sampling scopes: https://www.youtube.com/watch?v=99u53V7uDFY
36:54 Sampling scopes could be cheaper solution for entry level signal integrity
37:08 Freesample: https://github.com/azonenberg/freesample
38:30 Explanation of how a sampling scope works
41:47 glscopeclient: https://github.com/azonenberg/scopehal-apps
45:35 glscopeclient roadmap
50:30 probono or discounted services for open hardware projects
53:09 contacting Andrew https://twitter.com/azonenberg