EE Times Current

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EE Times Current provides a deep dive into the most compelling stories in the electronics industry. Tune in to keep yourself current on what matters to design engineers and other tech industry professionals

  1. 3 OCT

    A Theoretical Framework for Neuromorphic Technology?

    Brad Aimone from Sandia National Labs works with the world’s biggest neuromorphic platforms. In this episode of Brains and Machines, he talks to Sunny Bains of University College London about how this allows him to think deeply about what they’re good for. Discussion follows with Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

    55 min

  2. 9 SEPT

    Neurons Close the Loop from Insect Perception to Action

    Professor Barbara Webb from the University of Edinburgh in Scotland​ uses physical robots to validate neural mechanisms in crickets, ants, and bees. In this episode of Brains and Machines, she talks to Dr. Sunny Bains of University College London about her work. Discussion follows with Dr. Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

  3. 28 JUL

    Accelerating Complex Analog IC Design: The Power of Early Reliability Verification

    Today we’re talking about something that’s top-of-mind for a lot of you: closing the reliability gaps in increasingly complex analog and mixed-signal IC designs—and doing it earlier, faster, and more systematically. As designs become more heterogeneous and integration of IP blocks more intricate, traditional simulation and ERC tools often aren’t enough. They’re reactive by nature, catching issues too late in the flow—when rework is costly, and design intent is harder to trace. That’s why “shift-left” verification has become more than just a buzzword. It’s a strategic necessity. And today’s conversation is all about one of the tools helping to make that shift actionable: Siemens’ Insight Analyzer.

    19 min

  4. 14 JUL

    Can Neuromorphic Be Low-Power, Reconfigurable, and Scalable?

    Professor Gert Cauwenberghs has been working toward building brain-scale systems for decades. At the University of California San Diego, he’s now one of the leaders of the Neuromorphic Commons hub, also known as Thor, which will give the wider community access to neuromorphic hardware and simulators. In this episode of Brains and Machines, he talks to Dr. Sunny Bains of University College London about his approach to making systems that use minimal energy, are highly interconnected at all levels, and are surprisingly flexible. Discussion follows with Dr. Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

    51 min

  5. 8 JUL

    Event-Driven E-Skins Protect Both Robots and Humans

    Professor Gordon Cheng builds humanoid robots that can feel their environment using artificial skin. In this episode of Brains and Machines, he talks to Dr. Sunny Bains of University College London about how the skin was designed, how it improves safety and why neuromorphic engineering will be important for machine autonomy. Discussion follows with Dr. Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

    48 min

  6. 6 JUN

    Digital Prototypes May Enable Analog Neuromorphic Chips

    Dr. Charlotte Frenkel from the Technical University of Delft set records with a low-power neuromorphic chip she designed as part of her Ph.D. In this episode of Brains and Machines, she talks to Dr. Sunny Bains of University College London about what she has learned about building simplicity into chips and integrity into benchmarks. Discussion follows with Dr. Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

    53 min

  7. 30 MAY

    The State of Multi-Die Testing: Essential Insights for Designers

    The semiconductor industry is undergoing a shift with the rapid adoption of multi-die design, driven by the promise of improved power, performance, and area (PPA). But with innovation comes complexity, and one of the biggest challenges is ensuring silicon reliability and health through effective multi-die testing. In this episode, we dive deep into the world of multi-die design for test: what it means, how it differs from traditional monolithic design testing, and why it’s critical for the future of semiconductor manufacturing. Learn how testing spans from individual dies to multiple dies to die-to-die links, and why silicon data is essential for maintaining multi-die health during both manufacturing and in-field operations. We will explore the future of multi-die design for test and discuss Silicon Lifecycle Management (SLM) strategies that designers can implement today to stay ahead.

    26 min

  8. 2 MAY

    IBM Used Mathematics as Compass on Journey to NorthPole

    Dharmendra Modha’s TrueNorth chip added the word neuromorphic to the technorati lexicon back in 2014. In this episode of Brains and Machines, he talks to Sunny Bains of University College London about how that project led to his work on NorthPole and the axiomatic approach he took to design.

    50 min
See All (253)

About

EE Times Current provides a deep dive into the most compelling stories in the electronics industry. Tune in to keep yourself current on what matters to design engineers and other tech industry professionals

Information

  • Creator
    EE Times On Air
  • Years Active
    2018 - 2025
  • Episodes
    253
  • Rating
    Clean
  • Copyright
    © Copyright 2023 EE Times Current
  • Show Website
    EE Times Current

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