Semi Doped

Vikram Sekar and Austin Lyons

The business and technology of semiconductors. Alpha for engineers and investors alike.

  1. 5日前

    OpenAI’s Jalapeño! Feeling Hot Hot Hot!

    Austin and Vik react to OpenAI's Jalapeño announcement at Hot Chips. Plus extra spicy questions like should OpenAI sell it, how much of this was AI-written RTL, and where is Anthropic's chip? Key Takeaways: - The chip's core design philosophy is "dark silicon is cheaper than idle accelerators" — using one balanced chip and power-gating unused blocks is more efficient than a two-chip (e.g. GPU + LPU) solution. - The unprecedented nine-month RTL-to-tapeout cycle was enabled by AI for EDA tools, serving as a wake-up call that small, expert teams can now develop Rubin-class chips in under a year. - Jalapeño's key innovation is a NUMA-style architecture that gives each accelerator a local HBM slice, solving the memory contention that throttles performance in unified memory systems. - OpenAI chose Broadcom's ESUN for its scale-up network to connect 128 chips in the rack at 600 GB/s and up to 2,048 chips across 16 racks at 200G --- all scale up! - The design's "regret factor" principle justifies generality — the opportunity cost of being unable to support a future model is far higher than the marginal cost of adding hardware flexibility upfront. Chapters: 0:00 Hot Chips Reaction 2:32 Designing for User Experience 11:16 A Generalized Inference Chip 14:18 The Foundry-IDM Analogy 18:42 The 'Regret Factor' 21:02 The 9-Month Design Cycle 23:45 Challenging the Two-Chip Solution 35:08 Solving HBM Underutilization 36:46 The NUMA Architecture Solution 39:28 System-Level ESUN Networking 42:06 Dark Silicon vs. Idle Accelerators 49:08 A Wake-Up Call for the Industry 52:59 Where's Anthropic's Chip? Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/

  2. 8月24日

    Grok Bots and How CPUs are used in Agentic AI

    The rise of user-friendly agentic AI platforms will create a massive new demand category for dedicated, high-core-count "agentic CPUs" to execute tasks in parallel, fundamentally reshaping the server CPU market beyond just feeding GPUs. Key Takeaways: - The 'Mac Mini Craze' wasn't about having a GPU on your desk — it was also about security, as users needed a sandboxed machine to run untrusted agent code like OpenClaw, a problem cloud VMs solve too. - In AI servers, the GPU is the 'genius' doing the thinking, while the host CPU is the 'assistant' whose primary job is keeping the GPU fed, requiring high single-core performance. - Agentic tasks create a 'spillover' of parallel work that overwhelms the host CPU, creating a new demand category for dedicated, high-core-count 'agentic CPUs' in separate racks. - The procurement decision for agentic CPUs becomes about cost-per-core, or 'cost per employee' — balancing core count (like AMD's 256-core chips) against single-core speed. - Intel's P-rack (Performance) and E-rack (Efficiency) offerings are a direct response to this need for heterogeneous CPU solutions tailored to different agentic workloads. - The mass adoption of agentic AI could create demand for a billion new CPU cores in the cloud, driven by the convenience of 'easy button' platforms over self-hosting. - A key bottleneck to this heterogeneous future is the orchestration software needed to schedule jobs across different CPUs and accelerators from multiple vendors. Chapters: 0:00 Introducing Grok bot 3:45 Grok bot's Cloud VM Architecture 6:28 The 'Mac Mini Craze' Explained 14:38 Three CPU Deployment Models 16:02 GPU as Genius, CPU as Assistant 21:36 The Limits of the Host CPU 25:20 The 'Office Building' Analogy 29:09 Cost-Per-Core is the Metric 31:20 Intel's P-rack and E-rack 37:32 The Orchestration Bottleneck 40:19 Where Grok bot's VM Lives 44:22 The Unanswered Question Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/

  3. 8月18日

    Tensordyne's R K Anand: HPE Juniper Fabric, Logarithmic Math, MoE Inference, Air Cooling, 3nm

    Tensordyne co-founder and CPO R K Anand joins Austin to discuss the company's strategy for disrupting AI inference. RK explains how Tensordyne combines power-efficient logarithmic math with a battle-hardened networking fabric from partner HPE Juniper. The result is a high-density, air-cooled system designed to efficiently run massive Mixture-of-Experts models in existing data centers. Key Takeaways: - The core innovation isn't just log math, it's the patented method for accumulation. This turns expensive multiplications into cheap additions, freeing die space for a massive on-chip SRAM cache. - Networking is a partnership, not a project. Tensordyne leverages HPE Juniper's 7th-gen router fabric, skipping development cycles to get a 1-2 microsecond latency solution ideal for random MoE traffic. - The power and density claims are radical. By combining log math silicon with an air-cooled fabric, Tensordyne packs 72 chips into a 13U chassis at just 30 kW — a quarter of the space and power of an NVL72. - One go-to-market advantage is air cooling. The 30 kW, 19-inch rack system can be deployed in existing 'brownfield' enterprise and telco data centers that cannot support liquid cooling. - Partnerships de-risk the aggressive timeline. Broadcom provides access to TSMC 3nm and HBM, while strategic investor HPE Juniper provides the carrier-grade fabric with 'five nines' reliability. Chapters: 0:00 Introducing Tensordyne 5:32 The Juniper vs. Cisco Playbook 11:29 Origin Story: Automotive Power Constraints 15:37 The Secret Sauce of Log Math 18:02 Pivoting to the Data Center 22:08 Leveraging a Router Backplane for AI 27:22 Why Router Fabrics Suit MoE Models 34:12 The Three Phases of Inference Hardware 37:40 How One Chip Handles Pre-fill & Decode 40:34 The 'Too Good to Be True' System Specs 43:31 Go-to-Market: The Air-Cooled Advantage 48:21 De-risking with Strategic Partnerships 52:37 Solving the Software Problem with AI Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/ - The software moat is eroding. Tensordyne argues that modern agentic AI workflows can now automate the generation of optimized software kernels, solving the classic adoption problem for new hardware.

  4. 8月11日

    NEWS TAKE: China's Optical Ban, Volta's $10B Anthropic Deal, AMD's Earnings

    Austin Lyons and Vik Sekar break down three stories that hit semis last week. They analyze a proposed US ban on Chinese optical transceivers that threatens to cut off 50% of the global supply, the market's reaction to AMD's surprise $800M CapEx spend despite strong earnings, and how a new company called Volta Infrastructure landed a $10B compute deal with Anthropic by pioneering a new financial model for AI. Key Takeaways: - The proposed ban on Chinese optical transceivers is based on a flawed security rationale—the components are simple signal converters, not a meaningful vector for malware. - A ban would be self-defeating, as it would cut off the ~50% of global transceiver supply assembled in China, creating the very data center disruption it claims to prevent. - AMD's successful pivot to a data-center-first company (58% of revenue) is being scrutinized for its high CapEx—$800M vs an expected $200-300M—revealing the hidden costs of securing supply. - Nvidia's use of on-chip SRAM for inference's decode phase highlights a strategic gap for AMD, which lacks a compelling SRAM-based solution to compete on disaggregated workloads. - Volta Infrastructure's $10B deal with Anthropic is an innovation in finance, not tech; it applies low-cost 'infrastructure debt' to AI compute by framing clusters as predictable 'token factories'. - The Volta deal was necessary because all existing CSP capacity is allocated; it acts as a 'clean balance sheet' SPV to secure low-cost debt for Anthropic's new, dedicated Nvidia capacity. Chapters: 0:00 Intro: News Take Format 0:40 The China Optical Ban 4:02 A Flawed Security Rationale 11:30 Market & Supply Chain Impact 15:07 Investment Paralysis 15:52 AMD's Earnings Scrutiny 24:46 AMD's Missing SRAM Strategy 25:33 Volta's $10B Anthropic Deal 28:55 Volta's 'Toll Road' Model 32:19 Why the Volta Deal Was Necessary 33:38 The 'One Customer' Counterpoint 34:27 Wrap: Tech & Financial Innovation Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/

    NEWS TAKE: China's Optical Ban, Volta's $10B Anthropic Deal, AMD's Earnings

  5. 8月7日

    GlobalFoundries Thomas Barber: CPO, Silicon Photonics, 300mm, SiGe, OCI, NRZ

    The physical limits of copper are forcing a shift to optical interconnects in AI data centers. Austin sits down with GlobalFoundries' Thomas Barber to unpack why GF thinks it can lead that transition twice over: once with its long-running silicon photonics platform, and again with the specialty Silicon Germanium process the industry needs to drive it. "The enemy to me right now is copper. I'm trying to beat copper, right? If TSMC wins and we win, that's great because we're both displacing copper. And until all the copper is gone, there's plenty of market to go around." — Thomas Barber, GlobalFoundries Key Takeaways: - Copper's usable range halves every time the data rate doubles, and 200 Gbps/lane inside a rack-scale AI cluster is already past the point copper can handle. - CPO's real win isn't speed, it's power: saving 20-25 pJ/bit frees part of a data center's fixed 50-100 MW budget to go toward compute instead of moving bits. - GlobalFoundries leads photonics revenue for an unglamorous reason: it moved to 300mm wafers early, which yields 2.25x more die per wafer than the 200mm lines rivals still run. - CPO can end up more reliable than the pluggables it's replacing, not less, because it deletes the physical plug connector, and dust at that connector is the leading cause of field failures. - The OCI MSA picks NRZ over faster PAM4, deliberately going wide and slow, because NRZ's native bit error rate is a million times lower, which simplifies the receiver and cuts power. - GlobalFoundries stacks two specialty processes into one edge: micro-mirror couplers on the photonic side, and Silicon Germanium transistors hitting 350-400 GHz on the electrical side driving them. - The real competitor for silicon photonics isn't another foundry, it's copper itself — and that market is big enough that GlobalFoundries and TSMC can both win without taking share from each other. Chapters: 0:00 GlobalFoundries in Photonics 1:21 GF's Photonics Strategy 3:02 GF's Market Leadership 5:06 300mm Wafer Advantage 6:55 Copper's Range Limits 9:18 Pluggable to CPO 13:48 CPO Reliability 19:22 OCI MSA Explained 26:20 GF's Scale Platform 29:04 Micro Mirror Technology 31:32 Photonics vs. Copper 38:25 Silicon Germanium Advantage Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/

    GlobalFoundries Thomas Barber: CPO, Silicon Photonics, 300mm, SiGe, OCI, NRZ

  6. 8月1日

    How Retimers Built an $80B Company: The Story of Astera Labs

    A retimer is a small, unglamorous chip. Astera turned it into a high-margin franchise. Austin and Vik cover why copper gives up at PCIe speeds, what a retimer does that a redriver can't, and how one H100 socket became a moat. Then Scorpio: can Astera take switch share from Broadcom? Key Takeaways: - 30cm of PCB trace at Gen 5's 32 GT/s and the signal is gone. Signal integrity is an inside-the-server problem, not just a rack-to-rack one. - Gen 6 swaps NRZ for PAM4. Four voltage levels instead of two — a third the eye height, ~9.5 dB of SNR gone. - A redriver amplifies, noise included. A retimer recovers the clock and data, rebuilds the signal, and resets the jitter budget. - Astera won H100 by shipping PCIe 5 retimers at volume first, then bundling COSMOS on top. The chip became a fleet telemetry sensor. - Sticky socket: H100 carried straight into an Aries 6 design-in on Blackwell. - Scorpio moves up the stack. Same signal conditioning IP, higher ASP, pointed at Broadcom's PCIe switch business. - Astera granted Amazon a warrant — 3.26M shares at $142.82, vesting against up to $6.5B of purchases through 2033. Equity flowing to the customer, and it sizes the Scorpio P-Series commitment behind Trainium 2 and 3. Chapters: 0:00 The Astera Labs Franchise 3:32 The PCIe Copper Problem 6:53 Signal Smearing and Jitter 11:52 Eye Diagrams Explained 14:59 Equalization: Fixing the Signal 23:52 Redriver vs. Retimer 29:30 How Astera Won Nvidia 35:22 The Blackwell Scare 38:50 Scorpio: Moving into Switches 42:52 The UALink vs. Ethernet Battle 45:58 Taurus and Leo Product Lines Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/

    How Retimers Built an $80B Company: The Story of Astera Labs

  7. 7月29日

    News Take: Hyperscaler CDS, SK Hynix Earnings, China's DUV

    Austin Lyons and Vik Sekar break down the market's recent volatility. They discuss the rising fear around hyperscaler debt, visible in credit default swap (CDS) premiums, and the counter-argument that GPU ROI is actually understated. They then analyze the paradox of SK Hynix's massive stock drop despite record growth, and explain why China's new DUV lithography tool makes 3D chip stacking essential to their strategy. Key Takeaways: *  Hyperscaler debt fears are quantified by rising credit default swap (CDS) premiums, signaling investor nervousness that the AI CapEx firehose is shifting from cash flow to riskier debt. * The counter-take on debt is that hyperscalers are under-earning on GPU assets — as long-term contracts re-price to spot rates 2x higher, the hardware's ROI will justify the financing. * SK Hynix's 20% stock drop despite 257% YoY revenue growth shows a market priced for perfection, where a small miss against consensus triggers a panic disconnected from fundamentals. * The memory market paradox: commodity DRAM is currently more profitable than HBM because HBM's production is 3x less bit-efficient per wafer, consuming scarce supply while DRAM spot prices soar. * China's reported immersion DUV breakthrough is equivalent to ASML's late 2000s-era technology, a step toward self-sufficiency but not a leap to the leading edge. Chapters: 0:00 The Market Is Freaking Out 0:21 Hyperscaler Debt and Credit Default Swaps 3:56 The Counter-Take: Under-Earning on GPUs 6:18 SK Hynix: Record Growth, Market Carnage 8:10 The HBM vs. DRAM Profitability Paradox 10:35 Leverage, Retail, and Panic Selling 12:05 China's Immersion DUV Breakthrough 13:28 The Limits of DUV: 7nm and Multi-Patterning 14:14 Logic Folding and 3D Stacking 16:12 A Long Journey to Self-Sufficiency 17:05 Surviving Semiconductor Cyclicality Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/ Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/chipstrat Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr

    News Take: Hyperscaler CDS, SK Hynix Earnings, China's DUV

  8. 7月25日

    Datacenter Interconnects: Copper vs. Optics, Nvidia's 78-Layer PCB, Co-Packaged Optics (CPO)

    Vik Sekar and Austin Lyons tackle the biggest bottleneck in inference: moving data. They break down the three tiers of datacenter networking — scale up, scale out, scale across — and the core engineering trade-off at each layer: copper vs. optics. Topics include Nvidia's extreme measures to keep scale-up fabric electrical (a 78-layer mid-plane PCB), why Co-Packaged Optics is the "holy grail" everyone wants and no one can ship, and the serviceability problem standing in its way. Key Takeaways: A single 72-GPU scale-up rack needs 5,000+ cables spanning ~2 km — at that density, the power and cost of every connection becomes a system-level constraint, not an implementation detail.The scale-up rule is "copper when you can, optics when you must": each pluggable optical module adds ~30W, and with thousands of links in the fabric, that penalty compounds fast.Nvidia is pushing copper past its usual limits with a 78-layer mid-plane PCB — 3x+ the layer count of a typical complex board — specifically to avoid paying the optics power tax in its scale-up fabric.Scale-up isn't just a training problem. Frontier MoE models need 72-GPU domains to hit memory bandwidth targets, which pulls high-performance interconnect into the inference conversation.Scale-up has the highest connection density of the three tiers, making it the largest TAM and the sharpest three-way fight between NVLink, UA-Link, and Ethernet.Co-Packaged Optics could cut interconnect power by two-thirds — but a single failed laser could brick an entire multi-thousand-dollar GPU package, and that serviceability risk is what's keeping it on the roadmap instead of in racks.Chapters: 0:00 The Biggest Problem in Computing 7:14 The Three Tiers of Networking 13:49 Scale Up: Copper vs. Optics 17:59 Front-End vs. Back-End Networks 22:12 The Physical Scale of Cabling 28:46 Nvidia's 78-Layer Mid-Plane 33:16 How Optical Transceivers Work 39:16 The Power Penalty of Pluggables 42:09 The Business of Speed Transitions 44:40 The Promise and Peril of CPO 51:45 The Holy Grail of Networking Follow Chipstrat: Newsletter: https://www.chipstrat.com X: https://x.com/austinsemis Follow Vik: Newsletter: https://www.viksnewsletter.com/ X: https://x.com/vikramskr Follow Semi Doped: Get more of Austin and Vik daily, free: https://daily.semidoped.com/

    Datacenter Interconnects: Copper vs. Optics, Nvidia's 78-Layer PCB, Co-Packaged Optics (CPO)
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番組について

The business and technology of semiconductors. Alpha for engineers and investors alike.

情報

  • クリエイター
    Vikram Sekar and Austin Lyons
  • 配信期間
    26年
  • エピソード
    45
  • 制限指定
    不適切な内容を含まない
  • Copyright
    © 2026 Semi Doped
  • 番組のWebサイト
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