Five Minute VHDL Podcast

Francesco Richichi

Let's talk about hardware design using VHDL

  1. ١٨‏/٠٥‏/٢٠١٩

    Q&A#10 RAM Parallelism

    How I can parallelize a RAM in FPGA https://surf-vhdl.com/how-to-implement-a-multi-port-memory-on-fpga/ Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses

    ٤ د

  2. ١٣‏/٠٥‏/٢٠١٩

    ep#22-Multiplier optimization

    Learn how to optimize a multiplier in particular cases: For a technical analysis go to the post: https://surf-vhdl.link/OptimizationVhdl12b25 Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses

    ٥ د

  3. ٢٨‏/٠٤‏/٢٠١٩

    Ep#21-Serial-to-Parallel Parallel-to-Serial converter

    Link to the post: https://surf-vhdl.link/99990 Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses Music by Francis Preve - https://www.francispreve.com

    ٧ د

  4. ٢٣‏/٠٤‏/٢٠١٩

    Q&A#09-I need a clock!

    In this podcast we will understand how to connect a clock signal to our FPGA Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses

    ٩ د

  5. ١٠‏/٠٤‏/٢٠١٩

    Q&A#08- What is the dithering

    What is dithering? Where we can use this technique? Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses Music by Francis Preve - https://www.francispreve.com

    ٥ د

  6. ٠٦‏/٠٤‏/٢٠١٩

    ep#20-VHDL Generic

    VHDL Generic Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses Music by Francis Preve - https://www.francispreve.com

    ٦ د

  7. ٢٢‏/٠٣‏/٢٠١٩

    Ep#19-Iterative statement

    Even if the VHDL is not a software language, we can find a tyoica SW statement, the iterative statement. Let’s see how to use this https://t.me/SurfVhdl/92 Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses Music by Francis Preve - https://www.francispreve.com

    ٥ د

  8. ١٨‏/٠٣‏/٢٠١٩

    Ep#18-the conditional assignment in VHDL

    Let’s understand how to implement a conditional statement in VHDL image for the episode http://t.me/SurfVhdl/86 Website https://surf-vhdl.com Telegram channel https://t.me/SurfVhdl You can contact me mail: podcast@surf-vhdl.com Telegram: https://t.me/francesco_surfvhdl Teachable courses https://surf-vhdl.link/courses Music by Francis Preve - https://www.francispreve.com

    ٧ د
مشاهدة الكل (٣٣)

حول

Let's talk about hardware design using VHDL

المعلومات

  • صناع العمل
    Francesco Richichi
  • سنوات النشاط
    ٢٠١٩
  • الحلقات
    ٣٣
  • التقييم
    ملائم
  • حقوق النشر
    © Copyright Francesco Richichi
  • موقع البرنامج على الويب
    Five Minute VHDL Podcast